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Details of sci-electronics/iverilog:
Description: A Verilog simulation and synthesis tool
Homepage: http://iverilog.icarus.com https://github.com/steveicarus/iverilog
available versions:
| releases | alpha | amd64 | arm | hppa | ia64 | mips | ppc | ppc64 | ppc macos | s390 | sh | sparc | x86 | USE-Flags | dependencies | ebuild warnings |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| iverilog-9999 | - | - | - | - | - | - | - | - | - | - | - | - | - | none | show | show |
| iverilog-12.0 | - | - | - | - | - | - | - | - | - | - | - | - | - | none | show | show |
| iverilog-11.0 | - | - | - | - | - | - | - | - | - | - | - | - | - | none | show | show |
| iverilog-10.3 | - | - | - | - | - | - | - | - | - | - | - | - | - | examples | show | show |
+ stable
~ testing
- not available
some ebuild warning depend on specific use-flags or architectures, all ebuild-warnings are shown.